Real-time and continuous monitoring of Aging, Reliability, and Integrity of Integrated Circuits (ICs) during entire life-cycle is critical for trusted and secured microelectronics assurance. Currently available aging monitoring approaches using Ring Oscillators (RO) and Razor Circuitries suffer from limitations. The objective of this project is to develop additively integrated Resistive Random Access Memory (RRAM) based self-encrypted circuitries for Reliability, Integrity, and Aging monitoring over the entire life-cycle of ICs. Design of additive monitoring components with CMOS dies will be integrated in Electronic Design Automation (EDA) tools. Finally, on-chip machine learning techniques will be developed for analyzing data from these monitors for assurance.