Existing benchmarks for hardware trust applications are drawn from various suites and suffer from one or more of the following limitations: a) too small, b) too old, c) too few, d) designed for other problems, e) not characterized through logic and layout synthesis, and f) have limited applicability to trust problems. Accordingly, the problem addressed in this research is the construction, compilation, characterization, documentation, and release of suites of natural and synthetic benchmarks and benchmark generators for various hardware security and trust applications.

Specifically, objectives/tasks of this project are as follows: (1) Develop synthetic, controllable benchmark generators for (a) gate-level netlists, (b) finite state machines, and (3) register-transfer level (RTL) designs. Benchmark generators will be highly parameterized. (2) Generate synthetic benchmarks using the benchmark generators for various hardware security applications. (3) Collect natural, realistic, commercial-strength benchmarks from existing sources. (4) Characterize all benchmarks using existing logic and layout synthesis tools. (5) Document all the benchmarks for function, parameterization and characteristic data. (6) Organize the benchmarks and data in an on-line searchable database which will be released to CHEST members and the community at-large.