Wafer-Level Provenance Attestation: Machine Learning to the Rescue
Project ID:
P12_24
Principal Investigator:
Dr. Yiorgos Makris
Co-Principal Investigator(s):
N/A
Topic Areas:
Supply Chain Risk Management
Abstract
This project has been developing machine learning-based solutions for attesting the provenance of manufactured wafers containing integrated circuits (ICs), in order to provide assurance regarding their origin and curtail the risk of using these ICs in sensitive applications. Our conjecture is that the foundry, the equipment, and the mask-set used during manufacturing leave a systematic signature on fabricated wafers, which can be measured, modeled and compared against for the purpose of provenance attestation. Accordingly, we are developing machine learning-based methods which use measurements obtained at various steps of semiconductor manufacturing to quantitatively assess the likelihood that a wafer was fabricated at a trusted facility, through a trusted line of equipment and with a trusted mask-set. To evaluate our method, we are using an extensive dataset that has been furnished to us from one of the IAB members (GlobalFoundries), containing all available relevant data from approximately 8K wafers fabricated in an advanced FinFET technology node. In the first year of this multi-year project, we have demonstrated our methods in the context of attesting the mask-set that was used to fabricate a wafer. In the second year, we propose to extend our analysis in order to attest the different pieces of equipment that were used to fabricate a wafer and to investigate privacy preserving proof approaches.