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Enabling Trustworthy Hardware and IoT Design with Constrained Multi-Objective Deep Reinforcement Learning

Project ID:

P6_24

Principal Investigator:

Dr. Afsaneh Doryab

Co-Principal Investigator(s):

Dr. James H. Lambert

Topic Areas:

Root of Trust Verification/Formal Verification/Methods, Integrity Monitoring, Risk Mitigation

Abstract

Designing for various CHEST technologies often requires solving sequential decision-making problems. For example, when floorplanning a computer chip engineers must carefully consider the placement of each block, as each choice necessarily affects subsequent design decisions. Recently Deep Reinforcement Learning (DRL) has proven capable of performing chip floorplanning with success equaling or exceeding that of human experts. Chip floorplanning, however, is inherently multi-objective and constrained; for example, chips must be secure while also being power and space-efficient. The currently available tools make it difficult to efficiently assess the effects of changing objectives and constraints on the chip’s total efficacy. To address this issue, we will develop an Interactive Multiobjective Deep Reinforcement Learning tool with which human experts can assess the effects of changing objectives and constraints when developing CHEST technologies. For example, the tool allows chip designers to easily define competing objectives, impose specific constraints, and measure their effects. Chip designers can then quickly regenerate chip floorplans after updating objectives and/or constraints. We will benchmark the approach in increasingly complex environments and compare our results to existing benchmarks, including those that use DRL.

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